- 8051

8051 Assembly code to generate look up table for odd numbers

Hello guys, Lets see how to generate look up table for odd numbers.

There are three addressing modes in 8051 micro-controller: Immediate addressing mode, Direct addressing mode and indirect addressing mode. We use indirect addressing mode in this program to generate look up table for odd numbers.
Note: When we do division operation in 8051 accumulator register A holds quotient and accumulator register B holds the reminder.

 ALGORITHM:

  1. Start
  2. Initialize a register with base address of memory location where look up table needs to generated
  3. Initialize counter register with number of elements in look up table
  4. Initialize natural number register (Rd) with 01h
  5. Move 02h to accumulator register B
  6. Move value in Rd to accumulator register A
  7. Divide A by B and check if value in B is 1
    • If value in B is 1 then store the value in Rd to memory location, increment Rd and address register and jump to step 5
    • Else increment Rd and jump to step 5
  8. Repeat steps 5-7 until counter register becomes zero
  9. Stop

Here is example code for look up table of first 10 odd numbers stored in internal memory location with starting address 0xA0

 CODE: 

ORG 0000h                                        
 LJMP main                             ; Long jump main label
 ORG 0040h
  main:                         
  MOV R0,#0a0h                  ; Initializing base address of memory location
  MOV R1,#0ah                   ; Initializing counter register 
  MOV R2,#01h                   ; Initializing first natural number
  loop: MOV B,#02h            
   MOV A,R2
   DIV AB                ; A/B here register A holds quotient and B holds reminder after this instruction is executed
   MOV R3,B
   CJNE R3,#00h,store    ; Checking number is whether odd or even 
   INC R2
   SJMP loop
    
  store: MOV A,R2              ; Store the number if it is odd
   MOV @ R0,A            ; Moving odd number value to memory location
   INC R0                ; Incrementing address register
          INC R2                
   DJNZ R1,loop
end

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